The computation of the Discrete Fourier Transform (DFT) using the Fast Fourier Transform (FFT) algorithm has become one of the most important and powerful tools of HPC. FFTs are investigated to demonstrate the speed and accuracy of POSIT arithmetic when compared to floating-point arithmetic. Improving FFTs can potentially improve the performance of HPC applications such as CP2K, SpecFEM3D, and WRF, leading to higher speed and improved accuracy. “Precision” here refers to the number of bits in a number format, and “accuracy” refers to the correctness of an answer, measured in the number of correct decimals or correct bits. POSIT arithmetic achieves orders of magnitude smaller rounding errors when compared to floats that have the same precision. Read more...

Computer arithmetic is ubiquitous in applications ranging from an embedded domain such as smartphones to HPC applications like weather modeling. Specifically, in embedded systems, since the platforms have performance limitations due to limited power and area budgets, using appropriate arithmetic is desirable. Major semiconductor manufacturers involved in efficient domain-specific accelerator designs are investigating new arithmetic formats for their applications of interest. For example, the recently proposed bfloat16 format supports similar dynamic range as single-precision IEEE 754 compliantfloating point number, but with lower precision. The bfloat16 format is supported in several products by Intel, Google, and ARM. Read more...

The use of deep neural networks (DNNs) as a general tool for signal and data processing is increasing in automotive industry. Due to strict constrains in terms of latency, dependability and security of autonomous driving, machine perception (i.e. detection or decisions tasks) based on DNN can not be implemented relying on a remote cloud access. These tasks must be performed in real-time on embedded systems on-board the vehicle, particularly for the inference phase (considering the use of DNNs pre-trained during an off-line step). When developing a DNN computing platform, the choice of the computing arithmetics matters. Moreover, functional safeapplications like autonomous driving pose severe constraints on the effect that signal processing accuracy has on final rate of wrong detection/decisions. Read more...

Floating point computations required in many applications. Floating-point representations builds onthe work done in the 1970s and 1980s, before the IEEE standard was developed and codified in hardware. The choices made in IEEE leave much to be desired when accurate arithmetic and reproducibility of numerical computations are paramount, including support for an excessive number of not-a-number (NaN) representations, gradual underflow but not overflow, expensive exceptions such as subnormals, ambiguity due to two representations of zero, etc. POSIT representation have shown to provide a better trade-off between precision and dynamic range, and in effect increase the accuracy per bit stored. Read more...

The forecast error of a weather forecast model has several origins: (i) Initial and boundary condition errors, which result from observations, data assimilation and external factors; (ii) model error, i.e. the difference between the mathematical model and the real world; (iii) discretization error resulting from a finite spatial and temporal resolution of the discretized equations and (iv) rounding errors with finite precision arithmetic. In general, the forecast error is dominated by (i-iii), depending on the forecast variable and the forecast lead time. In contrast, rounding errors are usually negligible with the IEEE 754 standard on 64bit double precision floating point numbers, which is still the standard for the majority of operational weather forecasts and in climate models. Read more...

We have discussed performance and energy consumption of GPU and SupersoniK via implementing financial market models. The case studies used in this comparison arethe Black-Scholes model and the Heston model for option pricing problems, which are analyzed numerically by Monte Carlo method. The final implementations of both models to several options onSupersoniK achieved the best parallel acceleration systems, in terms of performance-per-operation and energy-per-operation. Read more...

We have implemented electronic control unit (ECU) architecture for real-time automotive cyber-physical systems that incorporate security anddependability primitives with low resources and energy overhead. We quantify and compare temporal performance, and energy of Tez architecture for a steer-by-wire case study over CAN, CAN FD, and FlexRay in-vehicle networks. Implementation results reveal Tez can attain a speedup of 3.2× and 5.1×, respectively, while consuming 2.3× and 3.4× less energy, respectively, than the contemporary ECU architectures. Read more...

Heterogeneous or co-processor architectures are becoming an important component of high productivity computing systems. In this work the performance of a GPU is compared with the performance of a RacEr. A set of benchmarks are employed that use different process architectures in order to exploit the benefitsof RacEr. We show that the RacEr is more productive than the GPU for most of the benchmarks and conclude that FPGA-based GPU is best suited for GPU computing. Read more...

Neural networks (NN) are highly parallel workloads which require massive computational resources for training and oftenutilize customized accelerators. FalKon is best suited for NN, a set of benchmarks are employed that use different process architectures in order to exploit the benefits of FalKon. To help provide a fair baseline comparison, we conducted comprehensivebenchmarks of performance and energy of NN [Inception-v2 and ResNet-50, ResNet-18, Mobilenet-v2 and SqueezeNet], the FalKon is 2.1×–2.9× faster and 1.1×–2.2× more energy efficient than GPU implementations when running Inception-v2, ResNet-50, ResNet-18, Mobilenetv2 and SqueezeNet. Read more...

The recent surge of interest in DNNs has led to increasingly complex networks that tax computational and memory resources. Many DNNs presently use16-bit or 32-bit floating point operations. Significant performance and power gains can be obtained when DNN accelerators supportlow-precision numerical formats. Despite considerable research, there is still a knowledge gap on how low-precision operations can be realized for both DNN training and inference. In thiswork, we propose a DNN architecture, Deep Positron, with posit numerical format operating successfully at ≤8 bits for inference. Read more...

Performing the inference step of deep learning in resource constrained environments, such as embedded devices, is challenging. Success requires optimization at both software andhardware levels. Low precision arithmetic and specifically low precision fixed-point number systems have become the standard for performing deep learning inference. However, representingnon-uniform data and distributed parameters (e.g. weights) by using uniformly distributed fixed-point values is still a majordrawback when using this number system. Recently, the posit number system was proposed, which represents numbers in anon-uniform manner Read more...

The failure of Dennard's scaling, the end of Moore's law and the recent developments regarding Deep Neural Networks (DNN) are leading computer scientists, practitioners and vendors to fundamentally revise computer architecture to look for potential performance improvements. One such candidate is to re-evaluate how floating point operations are performed, which have remained (nearly) unchanged for the past three decades. The POSIT numerical format was introduced in mid-2017 and is claimed to be more accurate, have a wider dynamical range and fewer unused states compared to the IEEE-754. Read more...

POSITs are a tapered precision real number system that provide efficient implementations of fused dot products, enabling tensor processing with fine-grain rounding error control to deliver error-free linear algebra. The fundamental constraint in delivering error-free computation is an explicit management of the accumulation of intermediate results in programmer visible quires. These quires are reasonable for posit arithmetic, but grow very large for floating-point arithmetic. This creates an insurmountable constraint for incorporating quires into a general-purpose CPU as the context switch state becomes too large to be practical. Read more...

Strassen’s recursive algorithm for matrix-matrix multiplication has seen slow adoption in practical applications despite being asymptotically faster than the traditionalalgorithm. A primary cause for this is the comparatively weaker numerical stability of its results. Techniques that aim to improve the errors of Strassen stand the risk of losingany potential performance gain. Moreover, current methods of evaluating such techniques for safety are overly pessimistic orerror prone and generally do not allow for quick and accurate comparisons. Read more...

Floating-point operations can significantly impact the accuracy and performance of scientific applications on large-scale parallel systems. Recently, an emerging floating-point format called Posit has attracted attention as an alternative to the standard IEEE floating-point formats because it could enable higher precision than IEEE formats using the same number of bits. In this work, we first explored the feasibility of Posit encoding in representative HPC applications by providing a 32-bit Posit NAS Parallel Benchmark (NPB) suite. Then, we evaluate the accuracy improvement in different HPC kernels compared to the IEEE 754 format. Read more...

Recurrent neural networks (RNNs) are now at the heart of many applications such as image captioning, speech recognition, languagetranslation and modeling. In order to achieve the best possible inference accuracy, these RNN models tend be quite large and many utilize 16 or 32-bit floating point format, which can enormouslystretch memory resources. Quantizing the model parameters in lower bit precision would be required in order to deploy these models to edge and mobile devices with limited memory storage.In this report, we study the impact of various bit precisions and formats on speech-to-text neural performance. A particular emphasisis given to the posit numerical format which can yield higher accuracy than floats for a specific range of numbers. For this purpose,we implemented a Python module which can convert float numbers into posits of various bit lengths. Our speech recognitioninference results show that the posit numerical format is by far the best solution for aggressive quantization at 8-bit. Read more...

The Posit number format has been proposed by John Gustafson as an alternative to the IEEE 754 standard floatingpointformat. Posits offer a unique form of tapered precision whereas IEEE floating-point numbers provide the same relativeprecision across most of their representational range. Posits are argued to have a variety of advantages including better numericalstability and simpler exception handling. The objective of this paper is to evaluate the numerical stability of Posits for solving linear systems where we evaluateConjugate Gradient Method to demonstrate an iterative solver and Cholesky-Factorization to demonstrate a direct solver. Read more...